Senior GPU memory subsystem architect

What you will do

The Compute System Architecture (CSA) unit at imec desires to build zetta-scale AI/HPC hardware and software solutions co-designed. We are backed by a broad in-house R&D expertise, creating a new AI computing paradigm that will move the industry forward for many years to come. Designed in tune with advanced silicon geometry, novel communication technology, our architecture provides high-performance AI computing solutions in reliability, security, and power consumption at scale. We analyze emerging usage models, build hardware and software prototypes for data-driven computing hardware capable of zetta-scale performance.

The memory subsystem of a next generation AI/HPC system architecture --- as it interacts with the application workload, the program execution model and compute nodes and the rest of the uncore architecture --- has a high impact on the system performance and energy efficiency. As a memory subsytem researcher / architect, you are part of a team developing simulation infrastructures to model next generation AI/HPC systems to enable PPA based co-design across technology, architecture, and workloads. Your role spans a combination of the following responsibilities: you develop and integrate models (cycle level / functional / power / area) of relevant components of the memory subsystem (e.g., SSD/DRAM/...3D-SRAM to Cache/Directory Controllers, ...) in our simulation framework; you evaluate / demonstrate system level impact of various memory technologies/options and their organization (e.g., 3D 2.5D configurations) by designing appropriate experiments; you work with component/other-subsystem/workload modelling architects and propose and evaluate architectural innovations; you interface with RTL designers implementing the memory subsystem.

What we do for you

We offer you the opportunity to join one of the world’s premier research centers in nanotechnology at its headquarters in Leuven, Belgium. With your talent, passion and expertise, you’ll become part of a team that makes the impossible possible. Together, we shape the technology that will determine the society of tomorrow.

We are committed to being an inclusive employer and proud of our open, multicultural, and informal working environment with ample possibilities to take initiative and show responsibility. We commit to supporting and guiding you in this process; not only with words but also with tangible actions. Through imec.academy, 'our corporate university', we actively invest in your development to further your technical and personal growth.

We are aware that your valuable contribution makes imec a top player in its field. Your energy and commitment are therefore appreciated by means of a market appropriate salary with many fringe benefits.

Who you are

• Master’s or Doctoral degree in Computer Science or Electrical/Computer Engineering.
• You have deep understanding and a demonstrable experience in working with memory subsystems
• You have a background of modeling and/or digital implementation of SoC architecture for one or more application domains (Mobile, Server, GPU, …)
• Hands-on experience with modelling (functional and/or performance/PPA): e.g., SystemC /Gem5 /Sniper/Any-other
• Strong grasp of computer architecture fundamentals for the role (e.g., multi-core systems, cache/memory hierarchy, NoCs, MMUs--both hardware and software perspectives, ...) and familiarity with how software/programming models interact with memory subsystem.
• Strong C/C++ skills with relevant programming skills (e.g., python). Strong debugging and analytical skills to deal with modeling and evaluation issues.
• You quickly embrace new technological paradigms.
• You have effective communication skills in English, allowing you to perform well in a multicultural team and in close collaboration with our partners.
• Open minded, you seek and embrace differences and you encourage curiosity and accept challenges.
• Pragmatic and concise in your approach, you enjoy working with a focus on (collaborative) problem solving.