Go to the content

Postdoc Design and PPA Optimization of Multi-tier 3D Memory-on-Logic Multiscore SOC

In this post-doc, you join imec’s Physical Design Research team to target a more than two-tier 3D multi-core SOC design and optimization.

Language

English

Sector

Knowledge & Learning

What you will do

In this post-doc call, a more than two-tier 3D multi-core SOC design and optimization is targeted. To enable this, various 3D technologies will be implemented including the face-to-face 3D hybrid bonding and face-to-back TSV (through-silicon-via). In addition to these technology support, 3D EDA tool will be used to physically design the system. A multi-tier SRAM macro will be first explored which will further be integrated on top of a logic die with CPU to build a Memory-on-Logic 3D IC. High-impact publications including IEDM and VLSI conferences and TED, TVLSI, TCAS-I journals are expected.

What we do for you

We offer you the opportunity to join one of the world’s premier research centers in nanotechnology at its headquarters in Leuven, Belgium. With your talent, passion, and expertise, you’ll become part of a team that makes the impossible possible. Together, we shape the technology that will determine the society of tomorrow.

We are committed to being an inclusive employer and proud of our open, multicultural, and informal working environment with ample possibilities to take initiative and show responsibility. We commit to supporting and guiding you in this process; not only with words but also with tangible actions. Through imec.academy, 'our corporate university', we actively invest in your development to further your technical and personal growth. 

We are aware that your valuable contribution makes imec a top player in its field. Your energy and commitment are therefore appreciated by means of a competitive scholarship.

Who you are

  • PhD degree in Electronic Engineering, Microelectronics or other relevant PhD degree
  • SRAM macro design experience or knowledge
  • Knowledge and project experience of chip/IC design (using EDA tools such as Cadence Innovus, Virtuoso etc.), chip tape-out experience is a plus but not a must
  • 3D IC design or multi-core SOC design is a strong plus but not a must
  • It is important to enjoy working in an international environment, to be a good team player and to possess good written and oral communication skills in English.

This postdoctoral position is funded by imec through KU Leuven. Because of the specific financing statute which targets international mobility for postdocs, only candidates who did not stay or work/study in Belgium for more than 24 months in the past 3 years can be considered for the position (short stays such as holiday, participation in conferences, etc. are not taken into account).

How can we help?

The Leuven MindGate team is at your disposal for any questions about the Leuven Innovation Region. Do you want to invest, work or study in the region? We can help you find your way.

We also facilitate collaboration and innovation between companies, knowledge institutes and government within the Leuven Innovation Region, and we are happy to guide any of these stakeholders towards innovation.