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Novel Memory Circuit Design Engineer

Memory design and technology exploration for 1nm technology and beyond




Electronics & Engineering

What you will do

In this position, you will contribute to novel non-volatile pathfinding activities, such as MRAM and FeRAM through design technology co-optimization (DTCO) and hardware development and demonstration.

Your responsibilities will include:

  • You will design and layout MRAM/FeRAM bitcell, array and complex periphery IC of new micro-architecture concepts for test-chips
  • You will aid in designing and layout various other test-keys to enable MRAM/FeRAM hardware demonstration
  • You will use your knowledge of circuit design implementation to assess power, performance, and area of various memory technology which can be validated through measurement
  • You will perform pre/post silicon validation
  • You will have close interaction with process teams in a DTCO platform that includes lithography, device modeling and process integration

What we do for you

We offer you the opportunity to join one of the world’s premier research centers in nanotechnology at its headquarters in Leuven, Belgium. With your talent, passion and expertise, you’ll become part of a team that makes the impossible possible. Together, we shape the technology that will determine the society of tomorrow.

We are committed to being an inclusive employer and proud of our open, multicultural, and informal working environment with ample possibilities to take initiative and show responsibility. We commit to supporting and guiding you in this process; not only with words but also with tangible actions. Through imec.academy, 'our corporate university', we actively invest in your development to further your technical and personal growth.

We are aware that your valuable contribution makes imec a top player in its field. Your energy and commitment are therefore appreciated by means of a market appropriate salary with many fringe benefits.

  • A full-time position in Leuven, Belgium
  • An exciting position in a rapidly growing, multi-disciplinary team
  • The chance to interact closely with circuit designers, device experts and process integration engineers as well as major foundry, fabless and EDA partners in imec’s eco-system
  • You will help drive imec’s technology and memory roadmap to build the semiconductor memory technology of the near and far away future.

Who you are

  • The ideal candidate will have a PhD in Electronics or a master with at least 5 years relevant industrial experience in memory design, layout, and implementation.
  • You have a background of IC layout and memory design
  • You have worked in multi-disciplinary teams, ideally both interacting with hardware designers as well as EDA vendors and foundry partners
  • You have a critical mindset, eager to explore new challenges in the future and evolve together with the changing R&D demands 
  • Open and constructive team player
  • Basic experience with circuit design, layout and simulation tools is a must (Virtuoso IC design, Hspice, Calibre DRC/LVS
  • Experience is novel memory (e.g. MRAM or other) testchip design/execution/validation is a plus

How can we help?

The Leuven MindGate team is at your disposal for any questions about the Leuven Innovation Region. Do you want to invest, work or study in the region? We can help you find your way.

We also facilitate collaboration and innovation between companies, knowledge institutes and government within the Leuven Innovation Region, and we are happy to guide any of these stakeholders towards innovation.