Postdoctoral Researcher System level thermal management

12 April 2021

Be a frontrunner in enabling System and Application driven technology optimization for future semiconductor roadmap.

What you will do

Chip power density and consequently on-chip hot spot temperature have been increasing steadily because of non-ideal technology scaling, leading to severely thermally constrained designs. An unfortunate side effect of miniaturization and the continued scaling of CMOS technology is a steady increase in power densities. The resulting difficulties in managing temperature, especially local hot spots, have become one of the major challenges for designers. High temperatures have several detrimental effects on VLSI systems in terms of lower performance, increased static power, and lifetime of the system. For all these reasons, it is important to model chip temperature in an accurate but also efficient way at all stages of the design. Thermal-aware design decisions can significantly improve design efficiency and reduce design cost.

System-Technology Co-Optimization (STCO) is an attractive option where scaling at logic cell level will be complemented by scaling at a global system level. STCO involves the system (for example Server, board and CPU/SoC) to be disintegrated, and subsequently reintegrated more densely or efficiently by using imec integration technologies. The fundamental challenge is STCO is to find useful system level modules that can benefit immensely by enablement novel integration with next generation of logic and memory resulting optimization of power, cost and performance for targeted application domains. To explore such an optimization path, a framework needs to be built that can capture the benefits of such technology solutions at a system level –providing further knobs for continuing the scaling path. This postdoc research will focus on the thermal modeling of a system in the STCO context.

  • The primary objective of this postdoc would be to model the thermal impact of an SoC consisting of logic, memory, and interconnect blocks. The modelling framework should be able to capture the impact of scaling the hardware for high-performance computing system.
  • After capturing the thermal impact, you are expected to mitigate the penalties due to thermal effect through system level optimization techniques such as workload balancing, functional partitioning across different layers (relevant in the case of 3D systems).
  • You will be responsible to build a scalable thermal-aware design methodology for building big systems with logic, memory and accelerator blocks processed in different layers.
  • The broad goal is implement a dynamic thermal management solution to enable better PPAC benefits at a system level.
  • It will be crucial to strike the right balance between modeling detail and flexibility. The key components in a system should be modeled, but only to the extent needed to show their interaction and the benefits of new integration technologies. Detailed thermal models of specific technological solutions for logic cores, memories and interconnect and I/O is already being done at imec, which can serve as input to this framework.

What we do for you

We offer you the opportunity to join one of the world’s premier research centers in nanotechnology at its headquarters in Leuven, Belgium. With your talent, passion and expertise, you’ll become part of a team that makes the impossible possible. Together, we shape the technology that will determine the society of tomorrow.

We are proud of our open, multicultural, and informal working environment with ample possibilities to take initiative and show responsibility. We commit to supporting and guiding you in this process; not only with words but also with tangible actions. Through, 'our corporate university', we actively invest in your development to further your technical and personal growth.

We are aware that your valuable contribution makes imec a top player in its field. Your energy and commitment are therefore appreciated by means of a competitive salary with many fringe benefits.

Who you are

  • You have a PhD degree in Electrical/Computer Engineering or other relevant discipline with research in the domain of system modeling, design or thermal modeling.
  • We need your experience with system architecture.
  • We value your experience with industry-standard EDA tools like Cadence/Synopsys, specifically system modeling tools and languages: SystemC, Platform Architect or similar.
  • We are looking for a good team player and your ability to work independently.

This postdoctoral position is funded by imec through KU Leuven. Because of the specific financing statute which targets international mobility for postdocs, only candidates who did not stay or work/study in Belgium for more than 24 months in the past 3 years can be considered for the position (short stays such as holiday, participation in conferences, etc. are not taken into account).

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